一种具有0.1度相位分辨率和超低相位误差的65纳米CMOS紧凑型d波段移相器

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2025-06-18 DOI:10.1109/jssc.2025.3577051

Takaya Uchino, Yudai Yamazaki, Anyi Tian, Chenxin Liu, Sunghwan Park, Abanob Shehata, Sena Kato, Takumi Kojima, Haruto Tanaka, Masayuki Kikuchi, Jill Mayeda, Ryuji Kinugawa, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

引用次数: 0

摘要

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Compact D-Band Phase Shifter With 0.1-Degree Phase Resolution and Ultra-Low Phase Error in 65-nm CMOS

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来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.