一种紧凑的180 ghz堆叠fet振荡器，输出功率为11 dbm， dc - rf效率为13.9%，采用45纳米CMOS SOI工艺

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2024-12-05 DOI:10.1109/jssc.2024.3501388

Jingjun Chen, Li Zhang, Hao Wang, Xiaoguang Liu

引用次数: 0

摘要

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A Compact 180-GHz Stacked-FET Oscillator With 11-dBm Output Power and 13.9% DC-to-RF Efficiency in a 45-nm CMOS SOI Process

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.