An Ultralow-Power H.264/AVC Intra-Frame Image Compression Accelerator for Intelligent Event-Driven IoT Imaging Systems

This letter presents an ultralow-power (ULP) H.264/AVC intra-frame image compression accelerator tailored for intelligent event-driven ULP IoT imaging systems. The H.264/AVC intra-frame codec is customized to enable compression of arbitrary nonrectangular change-detected regions. To optimize energy and latency from image memory accesses, novel algorithm-hardware co-designs are proposed for intra-frame predictions, reducing overhead for neighbor macroblock (McB) accesses by $2.6\times $ at a negligible quality loss. With split control for major processing phases, latency is optimized by exploiting data dependency and pipelining. Area and leakage of major computation units are reduced through data path micro-architecture reconfiguration. Fabricated in 40 nm, it occupies a mere 0.32 mm2 area with 4-kB SRAM. At 0.6 V and 153 kHz, it consumes only $1.21 {\mu }\text{W}$ , with 30.9 pJ/pixel compression energy efficiency that rivals state-of-the-art designs. For an event-driven IoT imaging system, the combination of the proposed accelerator and change detection brings $133\times $ reduction to the overall energy for regressing an image of change-detected region of interest.