基于交换机的仲裁协调,用于复制存储中的低尾延迟

IF 0.6 4区 计算机科学 Q4 COMPUTER SCIENCE, INFORMATION SYSTEMS
Gyuyeong KIM
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引用次数: 0

摘要

现代分布式存储需要微秒级的尾部延迟,但当前基于协调器的仲裁协调导致了繁重的延迟开销。本文提出了一种新的仲裁协调架构Archon,它支持微秒级复制存储的低尾部延迟。Archon的核心思想是利用新兴可编程交换机asic的灵活性和能力,在网络交换机中执行仲裁协调。我们的网络仲裁协调是基于现代可编程交换机同时提供纳秒级处理延迟和高灵活性的观察。为了实现这个想法,我们设计了一个定制的交换机数据平面。我们在Intel Tofino开关上实现了一个Archon原型,并进行了一系列的测试实验。实验结果表明,与基于协调器的方案相比,执政官方案可以提供更低的尾部延迟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Switch-Based Quorum Coordination for Low Tail Latency in Replicated Storage
Modern distributed storage requires microsecond-scale tail latency, but the current coordinator-based quorum coordination causes a burdensome latency overhead. This paper presents Archon, a new quorum coordination architecture that supports low tail latency for microsecond-scale replicated storage. The key idea of Archon is to perform the quorum coordination in the network switch by leveraging the flexibility and capability of emerging programmable switch ASICs. Our in-network quorum coordination is based on the observation that the modern programmable switch provides nanosecond-scale processing delay and high flexibility simultaneously. To realize the idea, we design a custom switch data plane. We implement a Archon prototype on an Intel Tofino switch and conduct a series of testbed experiments. Our experimental results show that Archon can provide lower tail latency than the coordinator-based solution.
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来源期刊
IEICE Transactions on Information and Systems
IEICE Transactions on Information and Systems 工程技术-计算机:软件工程
CiteScore
1.80
自引率
0.00%
发文量
238
审稿时长
5.0 months
期刊介绍: Published by The Institute of Electronics, Information and Communication Engineers Subject Area: Mathematics Physics Biology, Life Sciences and Basic Medicine General Medicine, Social Medicine, and Nursing Sciences Clinical Medicine Engineering in General Nanosciences and Materials Sciences Mechanical Engineering Electrical and Electronic Engineering Information Sciences Economics, Business & Management Psychology, Education.
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