高效容错量化神经网络加速器

Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, M. Kumm, P. Zipf, K. Vissers
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引用次数: 19

摘要

神经网络是目前应用最广泛的机器学习算法之一。特别是卷积神经网络(cnn)越来越受欢迎,并被评估用于自动驾驶汽车等安全关键应用。现代cnn具有巨大的内存带宽和高计算需求,挑战现有的硬件平台,以满足吞吐量,延迟和功耗要求。在安全关键系统中,功能安全和容错性需要作为附加要求加以考虑。一般来说,可以通过增加冗余来实现容错操作,这进一步加剧了计算需求。此外,出现的问题是,对于故障安全要求而言,用于性能缩放的修剪和量化方法是否会适得其反。在这项工作中,我们提出了一种方法来评估永久故障对量化神经网络(QNNs)的影响,以及如何有效地减少它们在硬件加速器中的影响。我们使用基于fpga的硬件加速错误注入,以实现快速评估。详细的分析表明,包含卷积层的qnn到目前为止对故障的鲁棒性不如通常认为的那样,并且可能导致准确率下降高达10%。为了避免这种情况,我们提出了两种不同的方法来增加它们的鲁棒性:1)选择性通道复制,它比常见的三模冗余增加的冗余少得多;2)折叠实现的处理元素的故障感知调度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Efficient Error-Tolerant Quantized Neural Network Accelerators
Neural Networks are currently one of the most widely deployed machine learning algorithms. In particular, Convolutional Neural Networks (CNNs), are gaining popularity and are evaluated for deployment in safety critical applications such as self driving vehicles. Modern CNNs feature enormous memory bandwidth and high computational needs, challenging existing hardware platforms to meet throughput, latency and power requirements. Functional safety and error tolerance need to be considered as additional requirement in safety critical systems. In general, fault tolerant operation can be achieved by adding redundancy to the system, which is further exacerbating the computational demands. Furthermore, the question arises whether pruning and quantization methods for performance scaling turn out to be counterproductive with regards to fail safety requirements. In this work we present a methodology to evaluate the impact of permanent faults affecting Quantized Neural Networks (QNNs) and how to effectively decrease their effects in hardware accelerators. We use FPGA-based hardware accelerated error injection, in order to enable the fast evaluation. A detailed analysis is presented showing that QNNs containing convolutional layers are by far not as robust to faults as commonly believed and can lead to accuracy drops of up to 10%. To circumvent that, we propose two different methods to increase their robustness: 1) selective channel replication which adds significantly less redundancy than used by the common triple modular redundancy and 2) a fault-aware scheduling of processing elements for folded implementations.
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