95 GHz下变频混频器在CMOS 65纳米技术

2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS) Pub Date : 2015-12-21 DOI:10.1109/COMCAS.2015.7360445

J. Elkind, E. Socher

{"title":"95 GHz下变频混频器在CMOS 65纳米技术","authors":"J. Elkind, E. Socher","doi":"10.1109/COMCAS.2015.7360445","DOIUrl":null,"url":null,"abstract":"This paper presents three single balanced down-converting mixer designs in CMOS 65 nm technology. The three designs operate at 95 GHz and reach a maximum conversion gain of 8, 6.9 and 10.2 dB respectively. Due to the use of single balanced topology, the designs occupy a relatively small core area of 0.89×0.51, 0.078×0.14 and 0.053×0.17 mm2 and their DC power consumption is only 26, 29 and 12.4 mW.","PeriodicalId":431569,"journal":{"name":"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)","volume":"290 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"95 GHz down converting mixers in CMOS 65 nm technology\",\"authors\":\"J. Elkind, E. Socher\",\"doi\":\"10.1109/COMCAS.2015.7360445\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents three single balanced down-converting mixer designs in CMOS 65 nm technology. The three designs operate at 95 GHz and reach a maximum conversion gain of 8, 6.9 and 10.2 dB respectively. Due to the use of single balanced topology, the designs occupy a relatively small core area of 0.89×0.51, 0.078×0.14 and 0.053×0.17 mm2 and their DC power consumption is only 26, 29 and 12.4 mW.\",\"PeriodicalId\":431569,\"journal\":{\"name\":\"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)\",\"volume\":\"290 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COMCAS.2015.7360445\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COMCAS.2015.7360445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文提出了三种基于CMOS 65纳米技术的单平衡下转换混频器设计。这三种设计的工作频率为95 GHz，最大转换增益分别为8、6.9和10.2 dB。由于采用单平衡拓扑，这些设计的核心面积相对较小，分别为0.89×0.51、0.078×0.14和0.053×0.17 mm2，直流功耗仅为26、29和12.4 mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

95 GHz down converting mixers in CMOS 65 nm technology

This paper presents three single balanced down-converting mixer designs in CMOS 65 nm technology. The three designs operate at 95 GHz and reach a maximum conversion gain of 8, 6.9 and 10.2 dB respectively. Due to the use of single balanced topology, the designs occupy a relatively small core area of 0.89×0.51, 0.078×0.14 and 0.053×0.17 mm2 and their DC power consumption is only 26, 29 and 12.4 mW.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS)

自引率

0.00%

发文量