{"title":"一种军用航空电子32位先进模块化处理器系统","authors":"D. R. Witzel","doi":"10.1109/DASC.1990.111333","DOIUrl":null,"url":null,"abstract":"A high-performance processor architecture embedded in a modular computer system with advanced application software real-time operating system support is discussed. The objective is to provide a powerful processing environment to satisfy the computational demands of data fusion and other expansion potentials of the avionics mission function. The processor engine of this system is the AMP (advanced modular processor), an extremely powerful 32-b embedded 20 MIPS processor deriving its performance from the MIPS R3000/R3010 RISC chip set. The distributed system architecture integrates multiple processors, a flexible I/O subsystem, and fault-tolerant features. A dual-redundant VME-like backplane and reconfiguration through reassignment of hot spare processors greatly increases reliability and availability. Consideration is given to the hardware system architecture, the external interfaces, the semiconductor technology, the real-time operating system, and the application software development.<<ETX>>","PeriodicalId":141205,"journal":{"name":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A military avionics 32-bit advance modular processor system\",\"authors\":\"D. R. Witzel\",\"doi\":\"10.1109/DASC.1990.111333\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-performance processor architecture embedded in a modular computer system with advanced application software real-time operating system support is discussed. The objective is to provide a powerful processing environment to satisfy the computational demands of data fusion and other expansion potentials of the avionics mission function. The processor engine of this system is the AMP (advanced modular processor), an extremely powerful 32-b embedded 20 MIPS processor deriving its performance from the MIPS R3000/R3010 RISC chip set. The distributed system architecture integrates multiple processors, a flexible I/O subsystem, and fault-tolerant features. A dual-redundant VME-like backplane and reconfiguration through reassignment of hot spare processors greatly increases reliability and availability. Consideration is given to the hardware system architecture, the external interfaces, the semiconductor technology, the real-time operating system, and the application software development.<<ETX>>\",\"PeriodicalId\":141205,\"journal\":{\"name\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-10-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DASC.1990.111333\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASC.1990.111333","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A military avionics 32-bit advance modular processor system
A high-performance processor architecture embedded in a modular computer system with advanced application software real-time operating system support is discussed. The objective is to provide a powerful processing environment to satisfy the computational demands of data fusion and other expansion potentials of the avionics mission function. The processor engine of this system is the AMP (advanced modular processor), an extremely powerful 32-b embedded 20 MIPS processor deriving its performance from the MIPS R3000/R3010 RISC chip set. The distributed system architecture integrates multiple processors, a flexible I/O subsystem, and fault-tolerant features. A dual-redundant VME-like backplane and reconfiguration through reassignment of hot spare processors greatly increases reliability and availability. Consideration is given to the hardware system architecture, the external interfaces, the semiconductor technology, the real-time operating system, and the application software development.<>