可重构介质中MIMO雷达系统鲁棒自适应性能分析

Raafia Irfan, Haroon-ur-Rasheed, W. A. Toor
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引用次数: 0

摘要

多输入多输出(MIMO)雷达系统的鲁棒自适应技术是目前研究的热点之一。在MIMO雷达系统中,线性无关的波形通过多个天线以不同的传播路径传输。从不同目标反射的波形彼此之间也是线性无关的,这允许应用几种众所周知的鲁棒自适应算法来实现高分辨率和抗干扰。该算法能够有效地抑制外部干扰,准确地估计目标的位置和幅度。在数字硬件出现之前,波束形成器是使用机械系统实现的。今天,现场可编程门阵列(FPGA)已经变得足够强大,可以执行大量的操作。FPGA也是一种可重构的数字硬件,可以在不同的应用中重用。本文研究了可重构介质FPGA中用于MIMO雷达系统的鲁棒Capon波束形成器(RCB)、双约束鲁棒Capon波束形成器(DCRCB)。硬件实现处理复杂的32位单精度浮点值在Virtex5 FPGA在180 MHz时钟。该实现从10个通道获取输入并计算自适应权重向量。在Verilog中对这两种算法的架构进行了编码,并从吞吐量、效率和硬件资源方面分析了它们的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance analysis of robust adaptive technique for MIMO radar Systems in reconfigurable medium
Robust adaptive techniques for multiple input and multiple output (MIMO) radar systems are one of the main focused area of research, nowadays. In MIMO radar system, linearly independent waveforms are transmitted using different propagation paths via multiple antennas. The waveforms reflected from different targets are also linearly independent with each other which allows to apply the several well-known robust adaptive algorithms to achieve high resolution and interference rejection. These algorithms reject the external interferences as well as accurately estimate the target location and amplitude. Before the advent of digital hardware, the beamformers were implemented using mechanical systems. Today, field programmable gate array (FPGA) has become powerful enough to perform the massive number of operations. FPGA is also a reconfigurable digital hardware which and can reuse for different applications. In this paper, authors investigate the Robust Capon Beamformer (RCB), Doubly Constrained Robust Capon Beamformer (DCRCB) in reconfigurable medium FPGA for MIMO radar systems. The hardware implementation deals with the complex 32-bit single precision floating point values in Virtex5 FPGA at 180 MHz clock. This realization takes input from 10 channels and computes the adaptive weight vector. The proposed architectures of both algorithms are coded in Verilog and analyzed their performance in terms of throughput, efficiency, and hardware resources.
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