The video and image processing emulation system VIPES

We present a real time emulation system for complete video processing schemes. Our emulation system is based on a commercial FPGA emulator and related software. To meet real time constraints, we have extended this emulation environment by dedicated video interfaces, efficient flexible FPGA macros, and a modified design flow. The feasibility of this methodology is shown for a two dimensional discrete cosine transform, resulting in a reduction of approximately 58% in terms of FPGA resources. The emulation frequency improves by 33%. Furthermore, by emulating different coefficient word widths and subjective evaluation of image quality, it could be shown that a word width of 10 bits is sufficient for our design.