Mohit Kumar Gupta, P. Weckx, S. Cosemans, P. Schuddinck, R. Baert, D. Jang, Y. Sherazi, P. Raghavan, A. Spessot, A. Mocuta, W. Dehaene
{"title":"N7以上6T SRAM阈值电压调优专用技术","authors":"Mohit Kumar Gupta, P. Weckx, S. Cosemans, P. Schuddinck, R. Baert, D. Jang, Y. Sherazi, P. Raghavan, A. Spessot, A. Mocuta, W. Dehaene","doi":"10.1109/ICICDT.2017.7993503","DOIUrl":null,"url":null,"abstract":"As scaling continues for FinFET technology nodes, variability in combination with targeted lower supply voltages results in reduced SRAM stability margins. In this paper, threshold voltage tuning from the technological side is used to enable low SRAM Vmin with minimum impact on logic performance. Furthermore, lower overall system energy consumption can be achieved by the lower Vmin. This exercise is crucial for the enablement of future technology nodes where single VTH masks could become a necessity.","PeriodicalId":382735,"journal":{"name":"2017 IEEE International Conference on IC Design and Technology (ICICDT)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Dedicated technology threshold voltage tuning for 6T SRAM beyond N7\",\"authors\":\"Mohit Kumar Gupta, P. Weckx, S. Cosemans, P. Schuddinck, R. Baert, D. Jang, Y. Sherazi, P. Raghavan, A. Spessot, A. Mocuta, W. Dehaene\",\"doi\":\"10.1109/ICICDT.2017.7993503\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As scaling continues for FinFET technology nodes, variability in combination with targeted lower supply voltages results in reduced SRAM stability margins. In this paper, threshold voltage tuning from the technological side is used to enable low SRAM Vmin with minimum impact on logic performance. Furthermore, lower overall system energy consumption can be achieved by the lower Vmin. This exercise is crucial for the enablement of future technology nodes where single VTH masks could become a necessity.\",\"PeriodicalId\":382735,\"journal\":{\"name\":\"2017 IEEE International Conference on IC Design and Technology (ICICDT)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Conference on IC Design and Technology (ICICDT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2017.7993503\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Conference on IC Design and Technology (ICICDT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2017.7993503","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7
As scaling continues for FinFET technology nodes, variability in combination with targeted lower supply voltages results in reduced SRAM stability margins. In this paper, threshold voltage tuning from the technological side is used to enable low SRAM Vmin with minimum impact on logic performance. Furthermore, lower overall system energy consumption can be achieved by the lower Vmin. This exercise is crucial for the enablement of future technology nodes where single VTH masks could become a necessity.
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