一种在高掺杂基板上改善射频性能的CMOS兼容工艺

L. Fernández, U. Arz, D. Schubert, E. Berenschot, R. Wiegerink, J. Flokstra
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引用次数: 2

摘要

在本文中,我们提出了CMOS级晶圆的CMOS兼容工艺,以便创建射频(RF)器件可以实现的特定区域,而不会产生与该基板相关的高损耗。该工艺基于深沟槽的再填充,允许氮化硅局部替换硅衬底,氮化硅具有非常好的射频性能(tan /spl delta/ = 5-9 10/sup -4/)。沟槽的深度约为30 /spl μ m,宽度约为2 /spl μ m,其间仍留有2 /spl μ m的硅空间。这样,一半的损耗衬底被氮化硅取代。我们提出的测量结果表明,cmos级晶圆的射频性能可以显着提高,以及对最相关的制造参数和对衬底最终射频性能的影响的仔细研究。这项新技术的另一个优点是可以将其用作前置CMOS工艺,从而允许CMOS电子器件与射频和微波元件的单片集成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A CMOS compatible process for improved RF performance on highly doped substrates
In this paper we present a CMOS compatible process for CMOS-grade wafers in order to create specific areas where radio frequency (RF) devices can be implemented without the high losses associated to this substrate. The process is based on refilling of deep trenches, which allows the local replacement of the silicon substrate by silicon nitride, which has very good RF properties (tan /spl delta/ = 5-9 10/sup -4/). The trenches are in the order of 30 /spl mu/m deep and 2 /spl mu/m wide, leaving a space of 2 /spl mu/m in between where the silicon still remains. In this way, half of the lossy substrate is replaced by silicon nitride. We present measurement results which indicate that the RF performance of CMOS-grade wafers can be significantly improved, as well as a careful study of the most relevant fabrication parameters and the consequences for the final RF performance of the substrate. An additional advantage of this new technique is the possibility of using it as a pre-CMOS process, thus allowing monolithic integration of CMOS electronics and RF and microwave components.
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