编译同步语言以优化公开数据路径体系结构的移动代码

Marc Dahlem, K. Schneider
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引用次数: 0

摘要

传统的处理器体系结构在利用指令级并行性(ILP)方面受到限制。造成这种限制的原因之一是它们的寄存器数量相对较少。因此,最近的处理器体系结构公开了它们的数据路径,以便编译器能够直接将结果从处理单元传输到其他处理单元。在这些体系结构中,同步控制异步数据流(SCAD)体系结构是最近提出的公开数据路径体系结构,其目标是完全绕过寄存器的使用。具有高度ILP(如SCAD)的处理器体系结构对于执行同步程序特别有用:同步程序的执行是由必须按数据流顺序执行的原子操作组成的一系列反应步骤。同步程序通常提供大量的ILP,以便公开的数据路径体系结构可以有效地执行这些程序。然而,SCAD的最佳代码生成是一个巨大的挑战:以前的工作已经展示了如何通过答案集编程(ASP)将基本块编译为SCAD的最佳移动代码。本文扩展了这种方法,以编译完整的同步程序,而不仅仅是基本块来优化移动代码。因此,开发了一种基于asp的编译器,通过最大限度地利用程序中的可用ILP,同时尊重可用处理器的可用资源限制,将Quartz程序转换为SCAD体系结构的代码。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Compiling synchronous languages to optimal move code for exposed datapath architectures
Conventional processor architectures are limited in exploiting instruction level parallelism (ILP). One of the reasons for this limitation is their relatively low number of registers. Thus, recent processor architectures expose their datapaths so that the compiler can take care of directly transporting results from processing units to other processing units. Among these architectures, the Synchronous Control Asynchronous Dataflow (SCAD) architecture is a recently proposed exposed datapath architecture whose goal is to completely bypass the use of registers. Processor architectures with a high degree of ILP like SCAD are particularly useful for executing synchronous programs: The execution of a synchronous program is a sequence of reaction steps that consist of atomic actions that have to be executed in dataflow order. Synchronous programs typically provide a lot of ILP so that exposed datapath architectures may execute these programs efficiently. However, optimal code generation for SCAD is a big challenge: Previous work already showed how one can compile basic blocks to optimal move code for SCAD by means of answer set programming (ASP). This paper extends this approach in order to compile complete synchronous programs instead of only basic blocks to optimal move code. As a result, an ASP-based compiler was developed to translate Quartz programs to move code for the SCAD architecture by maximizing the use of the available ILP in the program while respecting the available resource limitations of the available processor.
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