改进的网格并联计算机性能建模

Chia-Jiu Wang, V. Nelson, C. Wu
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引用次数: 2

摘要

提出并研究了一种消息传递计算机体系结构——改进的网格连接并行计算机(MMCPC)。MMCPC被设计成适合晶圆级集成的通用并行架构。采用广义随机Petri网(gspn)对MMCPC的行为进行了建模。GSPN性能建模结果表明,需要一种新的处理单元(PE)。提出了一种能够同时处理数据处理和消息传递的PE体系结构,并与类似传输器的PE进行了比较,估计了硅开销。在此基础上,推导出不同程序结构下MMCPC的最佳尺寸。以二维快速傅里叶变换问题为例,证明了MMCPC是一种经济高效的性能增强体系结构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance modeling of the modified mesh-connected parallel computer
A message-passing computer architecture called the modified mesh-connected parallel computer (MMCPC) is proposed and studied. The MMCPC is designed to be general-purpose parallel architecture suitable for wafer-scale integration. Generalized stochastic Petri nets (GSPNs) are used to model the behavior of the MMCPC. The GSPN performance modeling results show a need for a new processing element (PE). A PE architecture, able to handle data processing and message passing concurrently, is proposed, and the silicon overhead is estimated in comparison with transputerlike PEs. Based on the proposed PE, optimum sizes of the MMCPC for different program structures are derived. A two-dimensional fast Fourier transform problem is used as an example to demonstrate that the MMCPC is a cost-effective performance-enhancement architecture to a real problem.<>
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