Temperature cycle test study on thick metal passivation cracks

Semiconductor passivation layer cracking is considered critical as it can lead to moisture ingress into the device circuits and cause corrosion. The issue is more acute for high aspect ratio thick top metallization where the stress intensity factor (SIF) is higher. The cracks are caused by displacement of the metal which has a much larger Coefficient of Thermal Expansion (CTE) compared to the surrounding passivation layer. Inclusion of a sandwich titanium nitride (TiN) layer and higher Physical Vapor Deposition (PVD) temperature can reduce the probability of cracking. Metallization test structures with multiple corners have a higher chance of detecting cracks during process development.