可制造性电气设计的关键方向和路线图

A. Kahng
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引用次数: 7

摘要

半导体产品的价值越来越依赖于通过设计和可制造性设计(DFM)技术实现的“等效缩放”。本次演讲将讨论设计-制造界面中“同等规模”创新的趋势和路线图。第一部分将讨论电子DFM的规则。制造可变性和设计要求的主要方面是什么?设计能匹配过程吗,还是过程必须不可避免地适应设计?在何种意义上,“虚拟制造”或“统计优化”的概念能在设计流程中取得成功?设计技术应该如何平衡保持价值的分析和扩展价值的优化?我们应该如何平衡预防(通过构建纠正)与早期干预,与治疗(通过纠正构建),与“不伤害”的机会主义?或者,是可以很好地建模和预测的工具,还是可以实现上游假设的工具?第二部分将给出电DFM技术的路线图,受到新出现的挑战(应力/应变工程,掩模错误,双图案光刻等)的推动,并强调对< 45 nm节点的需求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Key directions and a roadmap for electrical design for manufacturability
Semiconductor product value increasingly depends on "equivalent scaling" achieved by design and design-for-manufacturability (DFM) techniques. This talk addresses trends and a roadmap for "equivalent scaling" innovation at the design-manufacturing interface. The first part will discuss precepts of electrical DFM. What are dominant aspects of manufacturing variability and design requirements? Can designs match process, or must process inevitably adapt to designs? In what sense can concepts of "virtual manufacturing" or "statistical optimization" succeed in the design flow? How should design technology balance analyses that preserve value, versus optimizations that extend value? How should we balance preventions (correct by construction), versus early interventions, versus cures (construct by correction), versus "do no harm" opportunism? Or, tools that can model and predict well, versus tools that can make upstream assumptions come true? The second part will give a roadmap for electrical DFM technologies, motivated by emerging challenges (stress/strain engineering, mask errors, double-patterning lithography, etc.) and highlighting needs for < 45 nm nodes.
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