{"title":"单片运动JPEG编解码LSI","authors":"S. Okada, Y. Matsuda, T. Watanabe, K. Kondo","doi":"10.1109/CICC.1997.606619","DOIUrl":null,"url":null,"abstract":"We have developed a single chip motion JPEG codec LSI that can compress and decompress VGA-size (640/spl times/480) JPEG images at the rate of 30 frames per second simply by connecting a single external buffer memory chip. The LSI uses compression ratio control to store a fixed number of images when there is limited memory capacity, and it compresses data stored in the frame buffer so that it can process signals at high speed without using high-speed image memory. The JPEG codec core is small (40,000 gates) and power consumption is low (220 mW) for broader application in image processing in consumer markets.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A single chip motion JPEG codec LSI\",\"authors\":\"S. Okada, Y. Matsuda, T. Watanabe, K. Kondo\",\"doi\":\"10.1109/CICC.1997.606619\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have developed a single chip motion JPEG codec LSI that can compress and decompress VGA-size (640/spl times/480) JPEG images at the rate of 30 frames per second simply by connecting a single external buffer memory chip. The LSI uses compression ratio control to store a fixed number of images when there is limited memory capacity, and it compresses data stored in the frame buffer so that it can process signals at high speed without using high-speed image memory. The JPEG codec core is small (40,000 gates) and power consumption is low (220 mW) for broader application in image processing in consumer markets.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606619\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606619","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We have developed a single chip motion JPEG codec LSI that can compress and decompress VGA-size (640/spl times/480) JPEG images at the rate of 30 frames per second simply by connecting a single external buffer memory chip. The LSI uses compression ratio control to store a fixed number of images when there is limited memory capacity, and it compresses data stored in the frame buffer so that it can process signals at high speed without using high-speed image memory. The JPEG codec core is small (40,000 gates) and power consumption is low (220 mW) for broader application in image processing in consumer markets.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
