{"title":"TESH网络上并行处理系统的快速原型设计","authors":"B. M. Maziarz, V. Jain","doi":"10.1109/IWRSP.1998.676663","DOIUrl":null,"url":null,"abstract":"The paper discusses implementation of advanced numerical and image-processing applications on a multiprocessor system. With a view toward 'coarse-grain' rapid prototyping, the authors implement two diverse applications onto a common framework, i.e. MAC type processors interconnected by a TESH network. TESH (Tori connected mESHes) is a recently developed interconnection network. It is hierarchical, thus allowing exploitation of computation locality as well as easy expansion, which permits efficient VLSI/ULSI realization, and appears to be well suited for 3-D VLSI/ULSI implementation. Specifically, the paper develops parallel implementation of (a) real-time solution of partial differential equations and (b) 2D wavelet transform, in such a way so as to completely hide the communication overhead. It is shown that the performance of TESH implemented algorithms is comparable to the MESH based algorithm. However, TESH networks are much easier to implement because of the significantly reduced wiring than MESH networks.","PeriodicalId":310447,"journal":{"name":"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)","volume":"606 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Rapid prototyping of parallel processing systems on TESH network\",\"authors\":\"B. M. Maziarz, V. Jain\",\"doi\":\"10.1109/IWRSP.1998.676663\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper discusses implementation of advanced numerical and image-processing applications on a multiprocessor system. With a view toward 'coarse-grain' rapid prototyping, the authors implement two diverse applications onto a common framework, i.e. MAC type processors interconnected by a TESH network. TESH (Tori connected mESHes) is a recently developed interconnection network. It is hierarchical, thus allowing exploitation of computation locality as well as easy expansion, which permits efficient VLSI/ULSI realization, and appears to be well suited for 3-D VLSI/ULSI implementation. Specifically, the paper develops parallel implementation of (a) real-time solution of partial differential equations and (b) 2D wavelet transform, in such a way so as to completely hide the communication overhead. It is shown that the performance of TESH implemented algorithms is comparable to the MESH based algorithm. However, TESH networks are much easier to implement because of the significantly reduced wiring than MESH networks.\",\"PeriodicalId\":310447,\"journal\":{\"name\":\"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)\",\"volume\":\"606 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWRSP.1998.676663\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWRSP.1998.676663","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Rapid prototyping of parallel processing systems on TESH network
The paper discusses implementation of advanced numerical and image-processing applications on a multiprocessor system. With a view toward 'coarse-grain' rapid prototyping, the authors implement two diverse applications onto a common framework, i.e. MAC type processors interconnected by a TESH network. TESH (Tori connected mESHes) is a recently developed interconnection network. It is hierarchical, thus allowing exploitation of computation locality as well as easy expansion, which permits efficient VLSI/ULSI realization, and appears to be well suited for 3-D VLSI/ULSI implementation. Specifically, the paper develops parallel implementation of (a) real-time solution of partial differential equations and (b) 2D wavelet transform, in such a way so as to completely hide the communication overhead. It is shown that the performance of TESH implemented algorithms is comparable to the MESH based algorithm. However, TESH networks are much easier to implement because of the significantly reduced wiring than MESH networks.