Tengteng Lei, Congwei Liao, Jie Huang, Ying Wang, Shengdong Zhang
{"title":"具有正反馈效应的a-InGaZnO TFT栅极驱动电路","authors":"Tengteng Lei, Congwei Liao, Jie Huang, Ying Wang, Shengdong Zhang","doi":"10.1109/CAD-TFT.2018.8608053","DOIUrl":null,"url":null,"abstract":"An a-InGaZnO TFT integrated gate driver circuit with a new inverter is proposed. The inverter features positive feedback from the output electrode to the gate electrode of the pull-up transistor, for suppressing the leakage current and enhancing the pull-up ability. Compared with the conventional designs, the proposed gate driver exhibits extended Vth shift margin from −8 V to +9 V.","PeriodicalId":146962,"journal":{"name":"2018 9th Inthernational Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT)","volume":"31 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An a-InGaZnO TFT Gate Driver Circuit with Positive Feedback Effect\",\"authors\":\"Tengteng Lei, Congwei Liao, Jie Huang, Ying Wang, Shengdong Zhang\",\"doi\":\"10.1109/CAD-TFT.2018.8608053\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An a-InGaZnO TFT integrated gate driver circuit with a new inverter is proposed. The inverter features positive feedback from the output electrode to the gate electrode of the pull-up transistor, for suppressing the leakage current and enhancing the pull-up ability. Compared with the conventional designs, the proposed gate driver exhibits extended Vth shift margin from −8 V to +9 V.\",\"PeriodicalId\":146962,\"journal\":{\"name\":\"2018 9th Inthernational Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT)\",\"volume\":\"31 3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 9th Inthernational Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CAD-TFT.2018.8608053\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 9th Inthernational Conference on Computer Aided Design for Thin-Film Transistors (CAD-TFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAD-TFT.2018.8608053","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An a-InGaZnO TFT Gate Driver Circuit with Positive Feedback Effect
An a-InGaZnO TFT integrated gate driver circuit with a new inverter is proposed. The inverter features positive feedback from the output electrode to the gate electrode of the pull-up transistor, for suppressing the leakage current and enhancing the pull-up ability. Compared with the conventional designs, the proposed gate driver exhibits extended Vth shift margin from −8 V to +9 V.