CMOS-based VLSI design of a specific integrated circuit (ASIC) sensor interface IC chip (non-reviewed)

A CMOS-based application specific integrated circuit (ASIC) has been designed, simulated and fabricated for the application of carbon nanotube-based strain sensor interface circuit. The ASIC consists of high performance operational amplifier (OPA), low-pass filter, and 12-bit dual-slope analog-to-digital converter (ADC). The ADC contains an integrator, a comparator, a counter, latch, and digital control logic. The low-pass filter was designed to remove the noise from the sensor. The ASIC was expected to be integrated with a carbon nanotube- based strain sensor to form a strain detection system. The Tanner design tools were used for the design and simulation of the mixed-signal integrated circuit, where L-Edit was used for the layout of circuit and T-SPICE was used for the simulation. Because of the limitation of the 2.2 mm times 2.2 mm chip size for fabrication in MOSIS, we modified the 12-bit ADC into a 4-bit ADC in the ASIC for the fabrication. After layout and post-simulation, the ASIC has been implemented on a 2.2 mm times 2.2 mm silicon chip die and fabricated by using MOSIS AMI 1.5 mum mixed- signal CMOS process technology available through MOSIS.