Lidija Filipović, O. Baumgartner, Z. Stanojević, H. Kosina
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摘要

这项工作提出了三维带对带隧道障碍的位置研究,以创造改进的隧道装置。具体来说,考虑了i-Si/n-InAs结。该材料体系中较大的晶格失配导致了界面的位错和带隙中的陷阱。可选择的器件配置被考虑将隧道从物理接口移动,从而减少晶格不匹配对隧道电流的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
BTB tunneling in InAs/Si heterojunctions
This works presents a study of the location of 3D band-to-band tunneling barriers in order to create improved tunneling devices. Specifically, the i-Si/n-InAs junction is considered. The large lattice mismatch in this material system causes dislocations in the interface and traps in the bandgap. Alternative device configurations are considered that move the tunneling away from the physical interface, therefore reducing the the effects of lattice mismatch on tunneling current.
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