损耗VLSI封装互连中瞬态的计算

J. Liao, O. Palusinski, J. Prince
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引用次数: 24

摘要

提出了一种有效的分析VLSI系统中损耗电互连(含频率相关参数)动态行为的方法。该方法允许包含由集总无源(R, L, C)和有源非线性器件(二极管,双极和MOS晶体管)网络终止的电气互连。该方法由脉冲响应数据导出传输线的电路模型,并将该模型整合到UANTL(亚利桑那大学非线性端接传输线在线网络模拟器)计算机程序中,该程序对具有非线性端接的耦合传输线进行时域分析。用该方法进行了数值实验。用这种方法得到的结果与其他已发表的结果进行了比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Computation of transients in lossy VLSI packaging interconnections
An efficient method for analyzing the dynamic behavior of lossy electrical interconnects (with frequency-dependent parameters) in VLSI Systems is presented. The method allows for inclusion of the electrical interconnects which are terminated by networks of lumped passive (R, L, C) and active nonlinear devices (diodes, and bipolar and MOS transistors). The method consists of deriving the circuit model for a transmission line from impulse-response data and incorporating this model into the UANTL (University of Arizona simulator for nonlinearly terminated transmission-line networks) computer program, which performs time-domain analysis for coupled transmission lines with nonlinear terminations. Several numerical experiments with this method were performed. Comparisons were made between the results obtained using this method and other published results.<>
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