{"title":"具有在线测试能力和增强容错能力的可重构ADC电路","authors":"Yueran Gao, Haibo Wang","doi":"10.1109/DFT.2009.31","DOIUrl":null,"url":null,"abstract":"This paper investigates techniques to minimize process-variation induced performance degradation in pipeline ADCs via circuit reconfiguration. By taking advantage of the modularity existing in pipeline ADC circuits, this work introduces a configurable switch network that makes it possible to move more accurate pipeline circuits to the preceding stages along the signal processing path. The reconfiguration feature also adds online testing capabilities and enhances fault-tolerance of pipeline ADCs. An implementation of reconfigurable 10-bit 1.5-bit per stage pipeline ADC circuit is presented. Circuit simulation shows both improved circuit performance and fault tolerance are achieved by circuit reconfiguration.","PeriodicalId":405651,"journal":{"name":"2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Reconfigurable ADC Circuit with Online-Testing Capability and Enhanced Fault Tolerance\",\"authors\":\"Yueran Gao, Haibo Wang\",\"doi\":\"10.1109/DFT.2009.31\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates techniques to minimize process-variation induced performance degradation in pipeline ADCs via circuit reconfiguration. By taking advantage of the modularity existing in pipeline ADC circuits, this work introduces a configurable switch network that makes it possible to move more accurate pipeline circuits to the preceding stages along the signal processing path. The reconfiguration feature also adds online testing capabilities and enhances fault-tolerance of pipeline ADCs. An implementation of reconfigurable 10-bit 1.5-bit per stage pipeline ADC circuit is presented. Circuit simulation shows both improved circuit performance and fault tolerance are achieved by circuit reconfiguration.\",\"PeriodicalId\":405651,\"journal\":{\"name\":\"2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-10-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2009.31\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2009.31","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Reconfigurable ADC Circuit with Online-Testing Capability and Enhanced Fault Tolerance
This paper investigates techniques to minimize process-variation induced performance degradation in pipeline ADCs via circuit reconfiguration. By taking advantage of the modularity existing in pipeline ADC circuits, this work introduces a configurable switch network that makes it possible to move more accurate pipeline circuits to the preceding stages along the signal processing path. The reconfiguration feature also adds online testing capabilities and enhances fault-tolerance of pipeline ADCs. An implementation of reconfigurable 10-bit 1.5-bit per stage pipeline ADC circuit is presented. Circuit simulation shows both improved circuit performance and fault tolerance are achieved by circuit reconfiguration.