{"title":"形式验证的主流使用策略","authors":"Raj S. Mitra","doi":"10.1145/1391469.1391674","DOIUrl":null,"url":null,"abstract":"Formal verification technology has advanced significantly in recent years, yet it seems to have no noticeable acceptance as a mainstream verification methodology within the industry. This paper discusses the issues involved with deploying formal verification on a production mode, and the strategies that may need to be adopted to make this deployment successful. It analyses the real benefits and risks of using formal verification in the overall verification process, and how to integrate this new technology with traditional technologies like simulation. The lessons described in this paper have been learnt from several years of experience with using commercial formal verification tools in industrial projects.","PeriodicalId":412696,"journal":{"name":"2008 45th ACM/IEEE Design Automation Conference","volume":"340 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Strategies for mainstream usage of formal verification\",\"authors\":\"Raj S. Mitra\",\"doi\":\"10.1145/1391469.1391674\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Formal verification technology has advanced significantly in recent years, yet it seems to have no noticeable acceptance as a mainstream verification methodology within the industry. This paper discusses the issues involved with deploying formal verification on a production mode, and the strategies that may need to be adopted to make this deployment successful. It analyses the real benefits and risks of using formal verification in the overall verification process, and how to integrate this new technology with traditional technologies like simulation. The lessons described in this paper have been learnt from several years of experience with using commercial formal verification tools in industrial projects.\",\"PeriodicalId\":412696,\"journal\":{\"name\":\"2008 45th ACM/IEEE Design Automation Conference\",\"volume\":\"340 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-06-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 45th ACM/IEEE Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1391469.1391674\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 45th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1391469.1391674","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Strategies for mainstream usage of formal verification
Formal verification technology has advanced significantly in recent years, yet it seems to have no noticeable acceptance as a mainstream verification methodology within the industry. This paper discusses the issues involved with deploying formal verification on a production mode, and the strategies that may need to be adopted to make this deployment successful. It analyses the real benefits and risks of using formal verification in the overall verification process, and how to integrate this new technology with traditional technologies like simulation. The lessons described in this paper have been learnt from several years of experience with using commercial formal verification tools in industrial projects.