在 Cadence Opus 环境下使用 Alliance 单元库教授芯片设计

M. Aberbour, A. Derieux, H. Mehrez, N. Vaucher
{"title":"在 Cadence Opus 环境下使用 Alliance 单元库教授芯片设计","authors":"M. Aberbour, A. Derieux, H. Mehrez, N. Vaucher","doi":"10.1109/MSE.1997.612556","DOIUrl":null,"url":null,"abstract":"Shares experience of teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries. This course is taken by the students of the Master Degree in Integrated Circuits and CAD for VLSI of the University of Pierre et Marie Curie of Paris. The course, organized mainly as laboratory work, is intended to teach an industrial set of CAD tools for VLSI. During the first year this course has been given, the students helped actively in the work of parametrizing the Cadence Opus tools to permit the use of the Alliance libraries. Alliance is a set of CAD tools and portable libraries for VLSI developed at the laboratory and distributed freely all around the world. This work has given rise to a design kit for the Alliance libraries under Cadence Opus. The design kit allows one to design complete circuits under Cadence Opus. During the course the students used the design kit to design a complete AMD2901 chip from the Advanced Micro Devices company starting from its architecture specification. In this paper we discuss the Cadence Opus database, then we present the general design method using the Cadence Alliance design kit. We also investigate the portability of the Alliance libraries to Cadence Opus, and describe the use of Opus to design an example circuit. Before drawing a conclusion we will lay out the general plan of the course.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries\",\"authors\":\"M. Aberbour, A. Derieux, H. Mehrez, N. Vaucher\",\"doi\":\"10.1109/MSE.1997.612556\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Shares experience of teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries. This course is taken by the students of the Master Degree in Integrated Circuits and CAD for VLSI of the University of Pierre et Marie Curie of Paris. The course, organized mainly as laboratory work, is intended to teach an industrial set of CAD tools for VLSI. During the first year this course has been given, the students helped actively in the work of parametrizing the Cadence Opus tools to permit the use of the Alliance libraries. Alliance is a set of CAD tools and portable libraries for VLSI developed at the laboratory and distributed freely all around the world. This work has given rise to a design kit for the Alliance libraries under Cadence Opus. The design kit allows one to design complete circuits under Cadence Opus. During the course the students used the design kit to design a complete AMD2901 chip from the Advanced Micro Devices company starting from its architecture specification. In this paper we discuss the Cadence Opus database, then we present the general design method using the Cadence Alliance design kit. We also investigate the portability of the Alliance libraries to Cadence Opus, and describe the use of Opus to design an example circuit. Before drawing a conclusion we will lay out the general plan of the course.\",\"PeriodicalId\":120048,\"journal\":{\"name\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-07-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Conference on Microelectronic Systems Education\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.1997.612556\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Microelectronic Systems Education","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.1997.612556","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

分享在 Cadence Opus 环境下使用 Alliance 单元库进行芯片设计的教学经验。该课程由巴黎皮埃尔和玛丽居里大学集成电路和超大规模集成电路 CAD 专业的硕士生选修。该课程主要以实验室工作的形式组织,旨在教授一套用于 VLSI 的工业 CAD 工具。在开设这门课程的第一年里,学生们积极参与了 Cadence Opus 工具的参数化工作,以便能够使用 Alliance 库。Alliance 是实验室为 VLSI 开发的一套 CAD 工具和便携式库,在全球免费发布。这项工作催生了 Cadence Opus 下的 Alliance 库设计工具包。通过该设计工具包,可以在 Cadence Opus 下设计完整的电路。在课程中,学生们使用该设计工具包从高级微设备公司的架构规范开始,设计了一个完整的 AMD2901 芯片。本文首先讨论了 Cadence Opus 数据库,然后介绍了使用 Cadence Alliance 设计工具包的一般设计方法。我们还研究了联盟库与 Cadence Opus 的可移植性,并介绍了使用 Opus 设计示例电路的情况。在得出结论之前,我们将列出课程的总体计划。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries
Shares experience of teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries. This course is taken by the students of the Master Degree in Integrated Circuits and CAD for VLSI of the University of Pierre et Marie Curie of Paris. The course, organized mainly as laboratory work, is intended to teach an industrial set of CAD tools for VLSI. During the first year this course has been given, the students helped actively in the work of parametrizing the Cadence Opus tools to permit the use of the Alliance libraries. Alliance is a set of CAD tools and portable libraries for VLSI developed at the laboratory and distributed freely all around the world. This work has given rise to a design kit for the Alliance libraries under Cadence Opus. The design kit allows one to design complete circuits under Cadence Opus. During the course the students used the design kit to design a complete AMD2901 chip from the Advanced Micro Devices company starting from its architecture specification. In this paper we discuss the Cadence Opus database, then we present the general design method using the Cadence Alliance design kit. We also investigate the portability of the Alliance libraries to Cadence Opus, and describe the use of Opus to design an example circuit. Before drawing a conclusion we will lay out the general plan of the course.
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