单平台10G-EPON 10.3 gbps /1.25 gbps双速率话单，采用82.5 GS/s采样IC和比特率自适应决策逻辑电路，具有快速突发模式锁定时间

36th European Conference and Exhibition on Optical Communication Pub Date : 2010-11-04 DOI:10.1109/ECOC.2010.5621284

N. Suzuki, K. Nakura, S. Kozaki, H. Tagami, M. Nogami, J. Nakagawa

{"title":"单平台10G-EPON 10.3 gbps /1.25 gbps双速率话单，采用82.5 GS/s采样IC和比特率自适应决策逻辑电路，具有快速突发模式锁定时间","authors":"N. Suzuki, K. Nakura, S. Kozaki, H. Tagami, M. Nogami, J. Nakagawa","doi":"10.1109/ECOC.2010.5621284","DOIUrl":null,"url":null,"abstract":"We demonstrate a novel 10G-EPON dual-rate CDR using single 82.5 GS/s sampling IC and dual-rate decision logic that achieves rapid burst-mode lock time of 37 ns at 10.3 Gbps in BER=10−3 and of 64 ns at 1.25 Gbps in BER=10−12 via dynamically phase and bit-rate varied optical packets.","PeriodicalId":391144,"journal":{"name":"36th European Conference and Exhibition on Optical Communication","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Single platform 10G-EPON 10.3-Gbps/1.25-Gbps dual-rate CDR with fast burst-mode lock time employing 82.5 GS/s sampling IC and bit-rate adaptive decision logic circuit\",\"authors\":\"N. Suzuki, K. Nakura, S. Kozaki, H. Tagami, M. Nogami, J. Nakagawa\",\"doi\":\"10.1109/ECOC.2010.5621284\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate a novel 10G-EPON dual-rate CDR using single 82.5 GS/s sampling IC and dual-rate decision logic that achieves rapid burst-mode lock time of 37 ns at 10.3 Gbps in BER=10−3 and of 64 ns at 1.25 Gbps in BER=10−12 via dynamically phase and bit-rate varied optical packets.\",\"PeriodicalId\":391144,\"journal\":{\"name\":\"36th European Conference and Exhibition on Optical Communication\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"36th European Conference and Exhibition on Optical Communication\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECOC.2010.5621284\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"36th European Conference and Exhibition on Optical Communication","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECOC.2010.5621284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

我们展示了一种新的10G-EPON双速率CDR，使用单个82.5 GS/s采样IC和双速率决策逻辑，通过动态相位和比特率变化的光分组，在BER=10−3时实现了37ns和64ns的快速突发模式锁定时间，在BER=10−12时实现了10.3 Gbps和1.25 Gbps的锁定时间。

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Single platform 10G-EPON 10.3-Gbps/1.25-Gbps dual-rate CDR with fast burst-mode lock time employing 82.5 GS/s sampling IC and bit-rate adaptive decision logic circuit

We demonstrate a novel 10G-EPON dual-rate CDR using single 82.5 GS/s sampling IC and dual-rate decision logic that achieves rapid burst-mode lock time of 37 ns at 10.3 Gbps in BER=10⁻³ and of 64 ns at 1.25 Gbps in BER=10⁻¹² via dynamically phase and bit-rate varied optical packets.

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36th European Conference and Exhibition on Optical Communication

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