基于FPGA的重传计寄生信号分量数字滤波计算

2011 9th East-West Design & Test Symposium (EWDTS) Pub Date : 2011-09-09 DOI:10.1109/EWDTS.2011.6116591

D. Velychko, Y. I. Vdovychenko

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引用次数: 1

摘要

本文介绍了一种用于重传计的数字滤波器的计算方法，该滤波器可以抑制重传器变换过程中产生的寄生信号频谱分量。该滤波器采用VHDL编程的FPGA实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGA

This paper presents a calculation of a digital filter for the retransmission meter, rejecting parasitic signal spectrum components appeared during transformation in the retransmitter. FPGA programmed in VHDL is being used in the filter.

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来源期刊

2011 9th East-West Design & Test Symposium (EWDTS)

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