{"title":"用于高动态范围光子模拟-数字转换的集成-转储接收器","authors":"T. D. Gathman, J. Buckwalter","doi":"10.1109/SIRF.2012.6160158","DOIUrl":null,"url":null,"abstract":"A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion\",\"authors\":\"T. D. Gathman, J. Buckwalter\",\"doi\":\"10.1109/SIRF.2012.6160158\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply.\",\"PeriodicalId\":339730,\"journal\":{\"name\":\"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"volume\":\"47 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIRF.2012.6160158\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2012.6160158","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion
A high-linearity integrate-and-dump circuit is proposed for the electrical interface to a photonic sampling system. The integrate-and-dump receiver operates at 2 GS/s with a 500ps period for integration, hold, and reset. Better than 7.5 ENOB is measured with a sinewave input. The integrate-and-dump receiver is fabricated in a 120nm SiGe BiCMOS technology with a core current consumption of 84 mA from a 5 V supply.