{"title":"多组态:模拟电路的DFT技术","authors":"M. Renovell, F. Azaïs, Y. Bertrand","doi":"10.1109/VTEST.1996.510835","DOIUrl":null,"url":null,"abstract":"A Design-For-Testability (DFT) technique for analog circuits, called the Multi-Configuration technique is presented. This technique exhibits some flexibility features since different solutions are possible for its implementation. Different degrees of granularity are associated to the different solutions, corresponding to a given trade-off between implementation cost and test and/or diagnosis facilities. The multi-configuration technique is illustrated and validated on a 8/sup th/ order band pass filter.","PeriodicalId":424579,"journal":{"name":"Proceedings of 14th VLSI Test Symposium","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"The multi-configuration: A DFT technique for analog circuits\",\"authors\":\"M. Renovell, F. Azaïs, Y. Bertrand\",\"doi\":\"10.1109/VTEST.1996.510835\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A Design-For-Testability (DFT) technique for analog circuits, called the Multi-Configuration technique is presented. This technique exhibits some flexibility features since different solutions are possible for its implementation. Different degrees of granularity are associated to the different solutions, corresponding to a given trade-off between implementation cost and test and/or diagnosis facilities. The multi-configuration technique is illustrated and validated on a 8/sup th/ order band pass filter.\",\"PeriodicalId\":424579,\"journal\":{\"name\":\"Proceedings of 14th VLSI Test Symposium\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 14th VLSI Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.1996.510835\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 14th VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1996.510835","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The multi-configuration: A DFT technique for analog circuits
A Design-For-Testability (DFT) technique for analog circuits, called the Multi-Configuration technique is presented. This technique exhibits some flexibility features since different solutions are possible for its implementation. Different degrees of granularity are associated to the different solutions, corresponding to a given trade-off between implementation cost and test and/or diagnosis facilities. The multi-configuration technique is illustrated and validated on a 8/sup th/ order band pass filter.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
