Proactive thermal aware scheduling

High temperatures and fluctuating temperatures decrease component reliability and lifespan. This work proposes a proactive software-based thermal aware scheduler to lower core temperature and its temperature fluctuations. It proposes a Simple Time Derivative (STD) scheduler, which uses the time derivative of the core temperature as a predictor. Major heat dissipating processes can be identified by their usage of integer arithmetic, float operations and other CPU performance counters. The “hot” processes are put to sleep for a short duration, if the time derivative goes above an empirically defined threshold. This work evaluates STD using FFT, SOR, LU, and Sparse benchmarks of the SciMark benchmark suite running on a desktop computer. We found upto 5° C decrease in average/peak temperatures as compared to the baseline approach (without any thermal scheduling). The execution penalties only apply to the hot processes and not the whole system. For LU/Sparse the core stayed at 35° C or below for 100%/82% of time with STD vs. only 28%/19% of increase in run-time for the baseline. Furthermore, for the baseline the temperature went over 40° C for 16% of run-time vs. 0% for the STD. Holding the temperature lower has advantages in cooling energy reduction particularly when several systems are running together in a room or in a server system. We also compared our results against Simple Threshold approach. STD provided lower run-time penalties and energy consumption than the Simple Threshold strategy and marginally outperformed in terms of temperature reduction. This research provides insight into the temperature reductions possible using a user-defined software approach and the corresponding penalties on the hot processes. The approach can be combined with air conditioning management techniques in server production systems to reduce energy consumption for any job mix where execution time is not paramount. The reduction in temperature and its variations also increases reliability and lifespan of the CPU chip.