A Compact Wideband Joint Bidirectional Class-G Digital Doherty Switched-Capacitor Transmitter and N-Path Quadrature Receiver through Capacitor Bank Sharing

Spectrally efficient complex modulation schemes are widely employed to support the exponential growth in data traffic. However, this places stringent requirements on the RF electronic frontends, including stringent linearity, high Peak-to-Average-Power-Ratio (PAPR), large modulation bandwidth, and energy efficiency, which poses major challenges in traditional analog RF design. On the other hand, continuous device scaling enables energy-efficient device switching at RF frequencies, which has opened the door to growing research efforts towards digital transmitter (Tx) and receiver (Rx) frontends. Notably, the past few years have witnessed the demonstration of a wide variety of digital power amplifiers with multi-mode operations and back-off efficiency/linearity enhancement [1]–[3]. N-path mixer-first digital receivers remain a popular topic due to their inherent capabilities of high linearity, tunable frontend filtering, and wideband operations [4]. While digital RF frontends naturally offer excellent RF performance and extensive reconfigurability, they commonly rely on architectures based on binary and/or unary arrays of sliced active and passive devices, which inevitably results in substantial area overhead compared to their analog RF counterparts. In particular, capacitor banks are widely used in various digital RF frontends, i.e., switched-capacitor PAs and N-path receivers, which often occupy a majority of the chip area. However, numerous commercial applications, e.g., IOT devices, require extremely compact RF frontends to fit within the application formfactor and cost budget.