管理VLSI设计过程

{"title":"管理VLSI设计过程","authors":"T. Chiueh, R. Katz, Val King","doi":"10.1007/BFb0014279","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":365610,"journal":{"name":"MIT-JSME Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Managing the VLSI Design Process\",\"authors\":\"T. Chiueh, R. Katz, Val King\",\"doi\":\"10.1007/BFb0014279\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":365610,\"journal\":{\"name\":\"MIT-JSME Workshop\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MIT-JSME Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1007/BFb0014279\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MIT-JSME Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/BFb0014279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}