{"title":"采用130纳米CMOS技术的集成x波段FMCW雷达收发器","authors":"T. A. Chowdary, Gaurab Banerjee","doi":"10.1109/IMARC.2015.7411385","DOIUrl":null,"url":null,"abstract":"A fully integrated low power X-band radar transceiver in 130 nm CMOS process is presented. The highly integrated sub-system includes a low-noise amplifier (LNA), a voltage buffer, a down-conversion mixer, a low pass filter (LPF), a voltage controlled oscillator (VCO), a VCO buffer and two power amplifier (PA) drivers. The receiver provides a voltage conversion gain of 10 dB. The output power of the transmitter including the PA is -2 dBm. The total DC power consumption of the transceiver is 36 mW from a 1.2 V supply and the size of the chip is 670 × 716 μm2.","PeriodicalId":307742,"journal":{"name":"2015 IEEE MTT-S International Microwave and RF Conference (IMaRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An integrated X-band FMCW radar transceiver in 130-nm CMOS technology\",\"authors\":\"T. A. Chowdary, Gaurab Banerjee\",\"doi\":\"10.1109/IMARC.2015.7411385\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully integrated low power X-band radar transceiver in 130 nm CMOS process is presented. The highly integrated sub-system includes a low-noise amplifier (LNA), a voltage buffer, a down-conversion mixer, a low pass filter (LPF), a voltage controlled oscillator (VCO), a VCO buffer and two power amplifier (PA) drivers. The receiver provides a voltage conversion gain of 10 dB. The output power of the transmitter including the PA is -2 dBm. The total DC power consumption of the transceiver is 36 mW from a 1.2 V supply and the size of the chip is 670 × 716 μm2.\",\"PeriodicalId\":307742,\"journal\":{\"name\":\"2015 IEEE MTT-S International Microwave and RF Conference (IMaRC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE MTT-S International Microwave and RF Conference (IMaRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMARC.2015.7411385\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE MTT-S International Microwave and RF Conference (IMaRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMARC.2015.7411385","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An integrated X-band FMCW radar transceiver in 130-nm CMOS technology
A fully integrated low power X-band radar transceiver in 130 nm CMOS process is presented. The highly integrated sub-system includes a low-noise amplifier (LNA), a voltage buffer, a down-conversion mixer, a low pass filter (LPF), a voltage controlled oscillator (VCO), a VCO buffer and two power amplifier (PA) drivers. The receiver provides a voltage conversion gain of 10 dB. The output power of the transmitter including the PA is -2 dBm. The total DC power consumption of the transceiver is 36 mW from a 1.2 V supply and the size of the chip is 670 × 716 μm2.