射频finfet的紧凑小信号模型

2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) Pub Date : 2012-03-14 DOI:10.1109/ICCDCS.2012.6188936

J. Alvarado, J. Tinoco, V. Kilchytska, D. Flandre, J. Raskin, A. Cerdeira, E. Contreras

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引用次数: 6

摘要

通过SPICE仿真对SOI finfet的小信号等效电路进行了建模。在Verilog-A中实现的紧凑模型很好地预测了RF SOI finfet的直流特性，并允许提取任何选定工作点的固有电导，跨电导和电容。将这些提取的集总元件组成的本征小信号等效电路用于SPICE模拟器。本文比较了直流法和宽带s参数法提取的参数。

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Compact small-signal model for RF FinFETs

Modeling of the small-signal equivalent circuit of SOI FinFETs through SPICE simulations is presented. A compact model implemented in Verilog-A predicts well the DC characteristics of RF SOI FinFETs and allows the extraction of the intrinsic conductance, transconductance and capacitances at any selected operating point. The intrinsic small-signal equivalent circuit composed of those extracted lumped elements is used in SPICE simulator. This paper compares the parameters extracted from both DC and wideband S-parameter methods.

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来源期刊

2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)

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