一个8位200MSmaple/s CMOS DAC

Binjie Zhu, Ziqi Song, Dongxu Yang, Y. Ye, Fule Li
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引用次数: 6

摘要

本文介绍了一种8位电流转向CMOS数模转换器(DAC)。采用优化电路匹配技术,工作频带范围为10MHz ~ 200MHz,无杂散动态范围(SFDR)衰减为61dB ~ 40dB。微分非线性和积分非线性的测量结果分别为0.16LSB和0.4LSB。该电路采用0.5um单聚三金属5V CMOS标准工艺制造。整个芯片的面积约为2.822 mm2。当采样率为200MHz时,DAC的功耗约为113mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 8-bit 200MSmaple/s CMOS DAC
This paper introduced an 8-bit current steering CMOS digital-to-analog converter (DAC). With optimized circuit matching technique, the working frequency band varies from 10MHz to 200MHz with a spurious-free dynamic range (SFDR) attenuating from 61dB to 40dB. The measurement results of the differential nonlinearity and integral nonlinearity is 0.16LSB and 0.4LSB, respectively. The circuit is fabricated in a 0.5um single poly three-metal 5V CMOS standard process. The whole chip occupies about 2.822 mm2. When the sampling rate is 200MHz, the power consumption of the DAC is about 113mW.
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