AHDL模型用于在设计过程的早期检测验证问题

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334) Pub Date : 1997-09-07 DOI:10.1109/ASIC.1997.617033

J.A. Barby, H. Shen

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引用次数: 0

摘要

开发了一套AHDL模型，以增强集成电路设计在制造之前的传统仿真验证。分析了典型的IC硬件验证单元，确定了仿真模型的最小子集及其规格。在一个简单的集成电路设计上编写并测试了概念验证模型，以说明它们的实用性。

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AHDL models to detect verification problems early in the design process

A suite of AHDL models has been developed to enhance the traditional simulation verification of an IC design before it goes to fabrication. A typical IC hardware verification unit is analyzed identifying a minimum subset of simulation models along with their specifications. Proof of concept models were written and tested on a simple IC design to illustrate their usefulness.

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Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)

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