Truly rapid prototyping requires high level synthesis

Truly rapid prototyping requires a combination of abstract design tools and field-programmable logic. In this paper, we study the application of high-level synthesis (HLS) in the design of field-programmable gate array (FPGA) based systems. Our experience using the Synopsys Behavioral Compiler to map designs onto the Altera RIPP10 board shows that HLS allows for a level of design space exploration that is unrealizable with register transfer level techniques. In addition, the use of HLS tools allows designers to prototype their designs with high-quality results and much faster design turnaround times. We discuss these issues in the context of our experiences with mapping a dual-tone multi-frequency (DTMF) receiver onto the RIPP10 board.