FSK调制解调器优化NCO设计

Muhammad Asif, Zeeshan Ahmed
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引用次数: 0

摘要

本文重点介绍了使用Xilnix ISE在Verilog上设计FSK调制器和解调器,并对NCO进行了精心的内存高效设计。基于FPGA的可重构无线电设计已成为当前研究的热点。设计包括调制器和解码器的实现细节;解码器的设计方法有很多种,本文简要讨论了各种方法的优缺点。时钟频率是载波频率的唯一决定因素,而设计的NCO产生精确的正弦波,内存利用率低。内存需求低至4字节;硬件优化是通过简化乘法和移位操作实现的。解码器可以锁定宽频率变化的数字锁相环设计也被考虑。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of Optimized NCO for FSK Modem
Paper highlights the design of a FSK modulator-demodulator on Verilog using Xilnix ISE with the careful memory efficient design of NCO. Reconfigurable radio design on FPGA has become the hot area of research these days. The design includes implementation details of Modulator and Decoder; decoder has been design in number of ways, paper briefly discusses the advantage and disadvantage of the approaches. Clock frequency is the only determining factor for the carrier frequency while the designed NCO creates accurate sine wave with low memory utilization. Memory requirement is as low as 4 bytes; hardware optimization is achieved using simplified multiplication and shift operation. Decoder can lock with wide variations of frequency digital PLL design is also considered.
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