Development of design models for nanomagnetic logic based combinatorial subsystem

Magnetic logic (ML) is considered a feasible alternative to the current CMOS technology, which is constantly shrinking in size to accommodate more circuitry in a chip. In ML, the magnetic domains are considered to render logic levels instead of electric charge used in CMOS based digital circuits. The spins in single domain magnetic dots are used to represent logic levels and magnetic coupling between neighboring dots is employed to realize the computational output. The ML design involves arranging dots along ferromagnetic and antiferromagnetic ordering to achieve a desired digital output. The optimum dimensions with shape of the dots, spacing between the dots, and few primitive digital gates were extensively studied in the past. In this paper, magnetic dots were arranged to exhibit carry ripple based full adder circuits. One bit and two bit full adder circuit was designed in an open source micromagnetic simulator and transient energy profile is used to propose footprint, delay and energy models for ML based higher order adder subsystems. The proposed ML based adder circuit was compared with other CMOS technology related adder circuits. The proposed model offers insights to design a large ML based digital system.