Design and Implementation of a Lightweight Cryptographic Module, for Wireless 5G Communications and Beyond

With the advent of 5G and 6G networks and the anticipated expansion of the Internet of Things (IoT), novel applications are developed to address the need for low latency, capacity, higher data rate, and QoS for an unprecedentedly large number of devices. Demand for lightweight, fast, and efficient cryptographic algorithms is emerging, as an increasing number of systems that are used daily are becoming time-critical and often constrained in resources. One such algorithm that has been proposed is stream cipher Espresso, developed to simultaneously improve both hardware size and performance. At the same time, NIST states that any proposed lightweight cryptographic algorithm must fulfill the standards outlined in the Hardware API for Lightweight Cryptography specification, in order to ensure fair benchmarking. In this paper, a Lightweight Cryptographic Module compliant with these requirements is suggested. The crypto core employs an optimized implementation of the Espresso algorithm, both in comparison to other stream ciphers and to other Espresso implementations in the literature. The system is built on the Spartan-7 series xc7s100fgga676-2 Field Programmable Gate Array (FPGA) and works at a maximum frequency of 687 MHz.