多芯片模块裸芯片测试技术

R. Fillion, R. Wojnarowski, W. Daum
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引用次数: 15

摘要

基于GE高密度互连(HDI)技术,开发了一种独特的裸片测试方法。这种方法允许在标准芯片载体测试插座中进行复杂asic(专用集成电路)和微处理器芯片的高速测试和筛选,而无需任何特殊的夹具或探针卡或测试阵列中的通用芯片集群。作者描述了HDI封装方法,以及如何利用它来执行RAM芯片、处理器和复杂asic的裸船预测试,以及如何利用它来提供完整的预组装老化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Bare chip test techniques for multichip modules
A unique bare-chip test methodology has been developed based upon the GE high-density interconnect (HDI) technology. This methodology allows at-speed testing and screening of complex ASICs (application-specific integrated circuits) and microprocessor chips over the full military temperature range in standard chip-carrier test sockets without any special fixturing or probe cards or in clusters of common chips in a test array. The authors describe the HDI packaging approach and how it is being utilized to perform bare-ship pretest of RAM chips, processors, and complex ASICs and how it can be utilized to provide full preassembly burn-in.<>
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CiteScore
3.10
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