{"title":"实时高清(1920x 1080@60fps) H.264/AVC帧内预测的硬件架构","authors":"S. Park, Jae Hun Lee","doi":"10.1109/ISCE.2008.4559505","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a hardware architecture for a real time H.264/AVC intra predictor generator that can support 1920times1080@60fps. The proposed hardware architecture can generate 16 intra predictors for all 4 times 4 and 16 times 16 intra prediction modes in one clock, in comparison, previous implementations could only generate 4 predictors.","PeriodicalId":378486,"journal":{"name":"2008 IEEE International Symposium on Consumer Electronics","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hardware architecture for real-time HD(1920×1080@60fps) H.264/AVC intra prediction\",\"authors\":\"S. Park, Jae Hun Lee\",\"doi\":\"10.1109/ISCE.2008.4559505\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a hardware architecture for a real time H.264/AVC intra predictor generator that can support 1920times1080@60fps. The proposed hardware architecture can generate 16 intra predictors for all 4 times 4 and 16 times 16 intra prediction modes in one clock, in comparison, previous implementations could only generate 4 predictors.\",\"PeriodicalId\":378486,\"journal\":{\"name\":\"2008 IEEE International Symposium on Consumer Electronics\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE International Symposium on Consumer Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCE.2008.4559505\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on Consumer Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCE.2008.4559505","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware architecture for real-time HD(1920×1080@60fps) H.264/AVC intra prediction
In this paper, we propose a hardware architecture for a real time H.264/AVC intra predictor generator that can support 1920times1080@60fps. The proposed hardware architecture can generate 16 intra predictors for all 4 times 4 and 16 times 16 intra prediction modes in one clock, in comparison, previous implementations could only generate 4 predictors.
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