Training On-chip Hardware with Two Series Memristor Based Backpropagation Algorithm

This study proposes an architecture using two series memristor circuits as synapses to install the weights of the artificial neural network. Two series memristor circuit is similar to half-bridge circuit so here only to create positive weights in the range [0;1]. The use of two memristor circuit will decrease 50% the number of memristor. By proposed memristor circuit, we exploit back-propagation algorithm to train a three-bit odd parity on-chip hardware instead of software implementation.