{"title":"德州仪器的4mb DRAM——新一代更快的DRAM","authors":"C.W. Rhodine","doi":"10.1109/NAECON.1991.165766","DOIUrl":null,"url":null,"abstract":"A 4-Mb DRAM (dynamic random access memory) family which improves upon the performance of the 1 Mb DRAM family is described. While increasing storage density and reducing memory access times, overall chip size is minimally affected. Development of 0.9- mu m CMOS technology for use on the 4-Mb DRAM allowed immediate speed and size improvements over the 1-Mb DRAM. Continual review of lessons learned on previous design insures that each successive DRAM generation is both more efficient in terms of architecture and more reliable in system use. In the case of the 4-Mb DRAM, this dedication to improvement has resulted tin a 20% speed enhancement, moderate size increase (1.6X), and improved reliability results.<<ETX>>","PeriodicalId":247766,"journal":{"name":"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Texas Instruments' 4 Mb DRAM-a new, faster generation of DRAM\",\"authors\":\"C.W. Rhodine\",\"doi\":\"10.1109/NAECON.1991.165766\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 4-Mb DRAM (dynamic random access memory) family which improves upon the performance of the 1 Mb DRAM family is described. While increasing storage density and reducing memory access times, overall chip size is minimally affected. Development of 0.9- mu m CMOS technology for use on the 4-Mb DRAM allowed immediate speed and size improvements over the 1-Mb DRAM. Continual review of lessons learned on previous design insures that each successive DRAM generation is both more efficient in terms of architecture and more reliable in system use. In the case of the 4-Mb DRAM, this dedication to improvement has resulted tin a 20% speed enhancement, moderate size increase (1.6X), and improved reliability results.<<ETX>>\",\"PeriodicalId\":247766,\"journal\":{\"name\":\"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.1991.165766\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 1991 National Aerospace and Electronics Conference NAECON 1991","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.1991.165766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
描述了在1mb DRAM系列性能基础上改进的4mb DRAM(动态随机存取存储器)系列。在增加存储密度和减少内存访问时间的同时,总体芯片尺寸受到的影响最小。用于4mb DRAM的0.9 μ m CMOS技术的开发使速度和尺寸比1mb DRAM得到了即时改进。不断回顾以前设计的经验教训,确保每一代DRAM在架构方面更高效,在系统使用中更可靠。在4mb DRAM的情况下,这种致力于改进的努力导致了20%的速度提高,适度的尺寸增加(1.6倍),并提高了可靠性。
Texas Instruments' 4 Mb DRAM-a new, faster generation of DRAM
A 4-Mb DRAM (dynamic random access memory) family which improves upon the performance of the 1 Mb DRAM family is described. While increasing storage density and reducing memory access times, overall chip size is minimally affected. Development of 0.9- mu m CMOS technology for use on the 4-Mb DRAM allowed immediate speed and size improvements over the 1-Mb DRAM. Continual review of lessons learned on previous design insures that each successive DRAM generation is both more efficient in terms of architecture and more reliable in system use. In the case of the 4-Mb DRAM, this dedication to improvement has resulted tin a 20% speed enhancement, moderate size increase (1.6X), and improved reliability results.<>