AIDA:从电路级到布局的自动化模拟IC设计流程

R. Martins, N. Lourenço, S. Rodrigues, J. Guilherme, N. Horta
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引用次数: 42

摘要

本文介绍了模拟集成电路设计自动化环境AIDA,该环境实现了从电路级规格到物理布局描述的设计流程。AIDA源于两种内部工具的整合,即genome - pof和LAYGEN II。genome - pof采用多目标多约束优化方法实现全自动化电路级合成,通过考虑角分析和电子模拟器作为评估引擎,解决了稳健的设计要求。LAYGEN II实现了DRC证明的全自动布局生成,基于大小电路级描述和高级布局指南,在技术独立的抽象布局模板中描述。LAYGEN II在自动布局生成过程中利用专家知识指导进化优化核。此外,进化计算技术被广泛应用于电路级和物理级,作为解决设计优化问题的工具。最后,AIDA环境演示了经典电路级拓扑和最先进技术的IC设计,并通过工业模拟器和分析工具(如HSPICE®和CALIBRE®)进行了验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AIDA: Automated analog IC design flow from circuit level to layout
This paper presents AIDA, an analog integrated circuit design automation environment, which implements a design flow from a circuit-level specification to a physical layout description. AIDA results from the integration of two in-house tools, namely, GENOM-POF and LAYGEN II. GENOM-POF performs fully automated circuit-level synthesis implemented with a multi-objective multi-constraint optimization approach, which addresses robust design requirements by considering Corners analysis together with an electrical simulator as the evaluation engine. LAYGEN II implements a DRC proved fully automated layout generation based on a sized circuit-level description and high level layout guidelines, described in a technology independent abstract layout template. The expert knowledge is used by LAYGEN II to guide the evolutionary optimization kernels during the automatic layout generation. Moreover, evolutionary computation techniques are extensively used, at both circuit-level and physical-level, as tool to solve design optimization problems. Finally, AIDA environment is demonstrated for the IC design of a classical circuit-level topology and state-of-the-art technology, and validated by industrial simulators and analysis tools, such as, HSPICE® and CALIBRE®.
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