A. Matsuzawa, M. Kagawa, M. Kanoh, S. Tada, S. Nakashima, K. Tatehara, K. Shimizu
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The 10-b, 10 MHz BiCMOS A/D (analog-to-digital) converter with a triple-stage conversion scheme, combined with two novel conversion schemes, the dynamic sliding reference method and the triangular interpolation method, has been developed. This novel conversion scheme and BiCMOS circuit technology reduce element counts of bipolar transistors to only 2000. A small active area of 2.5×2.7 mm2 and a low power dissipation of 350 mW with an acceptable SNR (signal-to-noise ratio) of 54 dB including internal sample/hold and reference voltage circuit have been achieved
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