一种轨对轨、恒增益CMOS运算放大器

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI:10.1109/APCCAS.2004.1412742

Yung-Chih Liang, Meng-Lieh Sheu, W. Hsu

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引用次数: 1

摘要

采用互补差分输入级和电流补偿技术，设计了一种轨对轨恒增益CMOS运算放大器。该芯片采用0.35/spl mu/m 1P4M CMOS标准逻辑流程实现。测量结果表明，该芯片在3V、35pF负载下工作时，可实现110dB增益、13.6MHz带宽、1.275mW功耗。

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A rail-to-rail, constant gain CMOS op-amp

A rail-to-rail constant gain CMOS operational amplifier was designed by using complementary differential input stage and current compensation skills. The chip was implemented by a 0.35/spl mu/m 1P4M CMOS standard logic process. The measurement results show that the chip can achieve 110dB gain, 13.6MHz bandwidth, and 1.275mW power consumption, when operating at 3V and 35pF load.

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The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.

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