{"title":"图像处理用多核芯片的算术逻辑单元","authors":"L. Vokorokos, E. Dankova, M. Chovanec","doi":"10.1109/ICETA.2012.6418621","DOIUrl":null,"url":null,"abstract":"Computer vision is a field of computer science which recently received increasingly to the fore. To accelerate computing in image processing can be used specialized processors that work on the principle of accelerators. Designed arithmetic-logic unit is a processor module, which executes image processing based on the selected instruction. The parallel design of arithmetic-logic unit can also accelerate image processing.","PeriodicalId":212597,"journal":{"name":"2012 IEEE 10th International Conference on Emerging eLearning Technologies and Applications (ICETA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Arithmetic-logic unit of multicore chip for image processing\",\"authors\":\"L. Vokorokos, E. Dankova, M. Chovanec\",\"doi\":\"10.1109/ICETA.2012.6418621\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Computer vision is a field of computer science which recently received increasingly to the fore. To accelerate computing in image processing can be used specialized processors that work on the principle of accelerators. Designed arithmetic-logic unit is a processor module, which executes image processing based on the selected instruction. The parallel design of arithmetic-logic unit can also accelerate image processing.\",\"PeriodicalId\":212597,\"journal\":{\"name\":\"2012 IEEE 10th International Conference on Emerging eLearning Technologies and Applications (ICETA)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 10th International Conference on Emerging eLearning Technologies and Applications (ICETA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICETA.2012.6418621\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 10th International Conference on Emerging eLearning Technologies and Applications (ICETA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETA.2012.6418621","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Arithmetic-logic unit of multicore chip for image processing
Computer vision is a field of computer science which recently received increasingly to the fore. To accelerate computing in image processing can be used specialized processors that work on the principle of accelerators. Designed arithmetic-logic unit is a processor module, which executes image processing based on the selected instruction. The parallel design of arithmetic-logic unit can also accelerate image processing.