利用FPGA技术实现真实编码的粒子群算法

Mohamed Sadok Ben Ameur, A. Sakly, A. Mtibaa
{"title":"利用FPGA技术实现真实编码的粒子群算法","authors":"Mohamed Sadok Ben Ameur, A. Sakly, A. Mtibaa","doi":"10.1109/STA.2014.7086765","DOIUrl":null,"url":null,"abstract":"In this paper, a parallel PSO algorithm structure based on (FSM) Finite state machine is proposed. The use of FPGA (Field Programmable Gate Array) has shown many advantages over other circuits based on swarm intelligence mainly due to its simplicity and robustness to solve mathematic problems that contain several variables. This paper evaluates the performance of the PSO that's why we developed a hardware architecture that accelerates its execution performance by updating velocity and position of particles. The fitness evaluation module is implemented and mapped into FPGA reconfigurable hardware. The accelerated execution performance of the proposed architecture is demonstrated on standard mathematical functions as well as on a real coded problem.","PeriodicalId":125957,"journal":{"name":"2014 15th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Implementation of real coded PSO algorithms using FPGA technology\",\"authors\":\"Mohamed Sadok Ben Ameur, A. Sakly, A. Mtibaa\",\"doi\":\"10.1109/STA.2014.7086765\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a parallel PSO algorithm structure based on (FSM) Finite state machine is proposed. The use of FPGA (Field Programmable Gate Array) has shown many advantages over other circuits based on swarm intelligence mainly due to its simplicity and robustness to solve mathematic problems that contain several variables. This paper evaluates the performance of the PSO that's why we developed a hardware architecture that accelerates its execution performance by updating velocity and position of particles. The fitness evaluation module is implemented and mapped into FPGA reconfigurable hardware. The accelerated execution performance of the proposed architecture is demonstrated on standard mathematical functions as well as on a real coded problem.\",\"PeriodicalId\":125957,\"journal\":{\"name\":\"2014 15th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 15th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/STA.2014.7086765\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 15th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STA.2014.7086765","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

提出了一种基于有限状态机的并行粒子群算法结构。FPGA (Field Programmable Gate Array,现场可编程门阵列)在求解包含多个变量的数学问题时具有简单性和鲁棒性,与其他基于群体智能的电路相比具有许多优势。本文评估了PSO的性能,这就是为什么我们开发了一个硬件架构,通过更新粒子的速度和位置来加速其执行性能。实现了适应度评估模块,并将其映射到FPGA可重构硬件中。在标准数学函数和实际编码问题上证明了该体系结构的加速执行性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of real coded PSO algorithms using FPGA technology
In this paper, a parallel PSO algorithm structure based on (FSM) Finite state machine is proposed. The use of FPGA (Field Programmable Gate Array) has shown many advantages over other circuits based on swarm intelligence mainly due to its simplicity and robustness to solve mathematic problems that contain several variables. This paper evaluates the performance of the PSO that's why we developed a hardware architecture that accelerates its execution performance by updating velocity and position of particles. The fitness evaluation module is implemented and mapped into FPGA reconfigurable hardware. The accelerated execution performance of the proposed architecture is demonstrated on standard mathematical functions as well as on a real coded problem.
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