采用65nm CMOS技术的200MS/s, 8位基于时间的模数转换器(TADC)

2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC) Pub Date : 2016-05-01 DOI:10.1109/JEC-ECC.2016.7518960

Mohamed Abdelkader, Ahmed M. A. Ali, A. Abdelaziz, M. Ismail, Mohamed Refky, Y. Ismail, H. Mostafa

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引用次数: 3

摘要

与传统的基于时间的模数转换器(tdac)相比，在各种需要更高分辨率和更低功耗的应用中，tdac是一个重要的模块。在基于时间的adc中，输入电压首先通过电压-时间转换器(VTC)电路转换为时间脉冲，然后通过时间-数字转换器(TDC)电路转换为数字输出。本文提出了一种具有高线性度和大动态输入范围的VTC和时间分辨率为3.9 ps的TDC的TDC，并提出了一个200MS/S、8位有效位元数(ENOB)为7.6位的TDC。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 200MS/s, 8-bit Time-based Analog to Digital Converter (TADC) in 65nm CMOS technology

Time-based-Analog-to-Digital-Converter (TADC) is an important block in various applications that require higher resolution and lower power consumption compared to the conventional ADCs at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted into a pulse in time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse is converted to a digital output by using a Time-to-Digital Converter (TDC) circuit. In this paper, a TADC is proposed with a VTC that achieves high linearity and large dynamic input range and a TDC that achieves a time resolution of 3.9 ps. A 200MS/S, 8-bit TADC with effective number of bits (ENOB) equals 7.6 bits is proposed.

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2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)

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