M. Ono, N. Suematsu, S. Kubo, Y. Iyama, T. Takagi, O. Ishida
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引用次数: 14
摘要
采用高电阻率Si衬底代替传统的低电阻率Si衬底,可以使片上匹配电路的螺旋电感损耗在1.9 GHz时降低61%,在5.8 GHz时降低78%,并改善了BJT的增益和噪声性能。通过等效电路模型的提取,这些改进被解释为衬底介质损耗的降低。制作的1.9 ghz频段片上匹配LNA在2v, 2ma直流电源下具有13.4 dB增益和1.9 dB NF, 5.8 ghz频段LNA在3v, 3ma直流电源下具有6.9 dB增益和3.3 dB NF。
1.9 GHz/5.8 GHz-band on-chip matching Si-MMIC low noise amplifiers fabricated on high resistive Si substrate
The use of high resistivity Si substrates, instead of the conventional low resistivity Si substrate, enables one to reduce the loss of spiral inductor for the on-chip matching circuit by 61% at 1.9 GHz and by 78% at 5.8 GHz and to improve gain and noise performance of the BJT. These improvements are explained as the reduction of dielectric loss of substrate by referring to equivalent circuit model extraction. The fabricated 1.9 GHz-band on-chip matching LNA performs 13.4 dB gain, 1.9 dB NF with 2 V, 2 mA DC power and 5.8 GHz-band LNA performs 6.9 dB gain, 3.3 dB NF with 3 V, 3 mA DC power.